What happens when the limits of traditional chip design collide with the relentless demand for AI and high-performance computing? In today's episode, I sit down with Abhijeet Chakraborty from Synopsys to explore how multi-die chip architectures are redefining the future of semiconductors. With Moore's Law slowing and the complexity of computing workloads skyrocketing, the industry is turning to multi-die solutions to push the boundaries of performance, scalability, and efficiency.
Synopsys is at the heart of this transformation, powering more than 95% of the world's advanced chip designs. As AI, IoT, and next-gen computing drive an insatiable need for faster, more efficient processors, the semiconductor industry is undergoing a radical shift. By 2035, the multi-die chip market is expected to reach $411 billion, with at least 50% of new HPC chip designs set to be multi-die or 3D by the end of 2025.
Abhijeet walks us through the breakthroughs in Universal Chiplet Interconnect Express (UCIe), the growing role of silicon lifecycle management, and how Synopsys is pioneering multi-die integration to help companies accelerate time-to-market while balancing power, performance, and cost. We also discuss how AI itself is being used to optimize semiconductor design, ensuring these complex chip architectures remain reliable and efficient.
With major industry players investing heavily in this technology, the semiconductor landscape is at a critical inflection point. But what are the biggest challenges in making multi-die architectures mainstream? How will innovations in packaging, interposers, and hybrid bonding influence adoption? And with AI models demanding unprecedented levels of compute power, can multi-die designs truly keep pace with the ever-expanding capabilities of artificial intelligence?
Join us for this deep dive into the future of semiconductors, the rise of chiplets, and why the next decade will be defined by radical shifts in computing architecture. As always, I'd love to hear your thoughts—where do you see the future of chip design heading, and what challenges do you think the industry must overcome?
[00:00:03] What happens when the semiconductor industry reaches its physical limits? Well, with Moore's Law slowing down, the demand for high-performance computing and AI is pushing chip design to a new era, one powered by multi-die architectures. And my guest today is going to demystify that world.
[00:00:26] He's from a company called Synopsys, a company at the heart of 95% of the world's advanced chip designs. And together, we'll explore how multi-die systems are reshaping the future of AI, HPC and beyond. And yet, we'll break down the traditional monolith chips, how they're hitting a wall and how multi-die architectures are solving the challenges by enabling greater scalability, power efficiency.
[00:00:55] And with the global semiconductor market projected to grow by 15% this year, and multi-die chip market set to reach $411 billion by 2035, we'll also discuss the broader industry trends and challenges that are helping to shape this transformation. So, is the semiconductor industry on the cusp of a new revolution?
[00:01:20] And how could this shift impact everything from AI training to financial forecasting? Well, it's time to introduce you to today's guest. So, a massive warm welcome to the show. Can you tell everyone listening a little about who you are and what you do? Thanks to be here, Neil. My name is Abhijit Chakraborty. You can call me Abhi, that's easy.
[00:01:45] I'm Vice President of Engineering and Synopsys, responsible for developing EDA tools and solutions for multi-die. And that includes system level 3D, feasibility, prototyping, flow planning, construction, implementation, using advanced packaging, integrated multiphysics, all of that. It's a huge, wide ecosystem.
[00:02:08] In addition, I am on the Technical Advisory Board on government-funded initiatives and in the Semiconductor Industrial Alliance Design Committee as well. Well, thank you for taking the time to sit down with me today. And I know it's fairly early there in the US as well. And we've got a lot to talk about today, especially with Moore's Law no longer scaling at the same place.
[00:02:33] One of the questions I'd love to ask you is how are multi-die architectures transforming the semiconductor landscape right now, especially to meet these growing demands of AI and high-performance computing. We're seeing so many different releases almost on a weekly basis now. There's so much exciting things at CES. But what are you seeing here? Yes, indeed.
[00:02:56] High-performance computing or HPC and AI, they share a growing demand for computational power, as you know, and power efficiency. If you look at the AI workload for training, for example, it involves processing a large amount of data. This requires hardware for matrix multiplication, tensor operations, real-time data processing, and machine learning algorithms.
[00:03:22] All of that very quickly requires your die size to exceed the electrical size limit, which is about 858 square millimeters. What that means is that you cannot manufacture a die with the size needed to support the functions of these HPC and AI applications. So inevitably, you have to break the problem up into portions or pieces.
[00:03:51] These are dies, and you have to connect these dies together. And that's why today, really, the leading edge HPCs and AIs, you cannot do it. You cannot implement them without multi-dies. And to enable this whole ecosystem, there is a requirement for ensuring that these dies can interconnect with each other very efficiently. So high bandwidth interconnect as well as with high performance and with high power efficiency.
[00:04:19] And there has been a lot of investment and advancements in the industry in this area. And certainly, Synopsys is working very closely with our stakeholders and ecosystem partners at the leading edge to enable these technologies. And one of the things I try and do every day on this podcast is demystify technology and help people, even outside of the world of tech, understand the value of technology, the ROI of those investments for etc.
[00:04:49] One of the things I wanted to highlight today is a huge stat I'm going to drop here. The global market for multi-die chips is projected to reach 411 billion by 2035. Just phenomenal. But what do you see as the key factors driving growth like this? And how are you at Synopsys position to support this shift? There's so much going on here, isn't there? Absolutely. It's actually an exciting time indeed in the semiconductor industry.
[00:05:18] And if you look at the numbers, it took the semiconductor industry six decades to reach about half a trillion dollars in revenue. And we expect that it will take just less than a decade, maybe eight to nine years to double that. Today, we are in the era of pervasive intelligence. And what that means is that we have system companies like automotive companies, as well as hyperscalers. They're developing their own chips.
[00:05:48] In addition, AI is pushing the envelope in many different areas in the semiconductor industry. So if you combine all of this along with the IoT drive as well, the semiconductor industry is indeed poised for a massive growth. Then you look at focus and investment from the various governments, including, of course, the U.S. government, the U.S. CHIPS Act,
[00:06:13] where the demand and push for increasing manufacturing capacity to increase and add more advanced packaging capabilities and sites, all of that bodes very well. And then the era of smart everything. What that means again is that almost every application from your sophisticated applications like your AI chips to your simple applications in your appliances at home,
[00:06:39] they all are going to be, quote unquote, smart, which means they will have a chip inside. And these chips will then communicate with other chips. And all of that is going to drive more and more designs and growth in the semiconductor industry.
[00:06:55] So indeed, the way we are in the synopsis is well positioned to not only support this demand and change, but also we are enabling a lot of these new technologies that will allow this massive growth. We talked about multi-dye in the previous answer. In addition to multi-dye, we are investing across the entire stack.
[00:07:19] We're talking about the process, from the simulation of devices and materials that help the foundries determine the best material for their next technology node, all the way to system level exploration, architectural exploration, and then, of course, multiphysics. And I've also been reading standards like Universal Chiplet Interconnect Express or UCIE are also playing a critical role in simplifying chiplet integration.
[00:07:49] And again, for people outside of this space, just to demystify it a little, because whenever we start talking about acronyms and things, it can get quickly confusing. So can you tell me a bit more about Synopsis, UCIE IP, and how that is helping engineers design these high-bandwidth, energy-efficient systems with faster time to market? Because there's a lot of cool things happening there, but a lot of complex technologies behind it. Can you demystify that for me? Of course.
[00:08:15] So there's actually a consortium of companies, and Synopsis is a core and critical member of this consortium. So we've been involved with it for a long time. And the goal of this consortium was to create a standardized interface for die-to-die connectivity. So that would enable the whole chiplet economy, right? So when you think about a library of chiplets, which are plug and play, they need to connect into a platform where there is standardized interconnect.
[00:08:45] Synopsis collaborated with Intel and TSMC to develop the first UCIE test chip in the industry. Actually, there are variations. You can have a UCIE IP from Synopsis either using an advanced package or using a standard package. Advanced package implies that the UCIE is using silicon for silicon bridge or silicon interposer for interconnection, and that means higher performance, better power efficiency.
[00:09:12] And standard package, or UCIE S, means you're using your organic package, a traditional interposer, which are lower in performance, but they're lower in cost as well. And all of this is, again, important and essential to allow high-end multi-die devices to communicate with each other without any performance loss.
[00:09:35] And, of course, multi-systems can also introduce new challenges in everything from testing to reliability and overall lifecycle management. So a question I've got to ask, how does Synopsis multi-solutions leverage AI-driven analytics to improve and ensure reliability and system health throughout the lifestyle? Because it is a pretty big problem, isn't it?
[00:09:59] It is indeed a big problem, and like you said, Neil, it's an even bigger problem with multi-die because of the significant complexity involved. And almost inevitably, multi-die means you're dealing with a complex chip. So silicon lifecycle management, which is what you're alluding to, is an extremely important area, and Synopsis has been investing in this area for a long time, and we have some very unique solutions in this area.
[00:10:26] So just imagine you have two dies which are connected to each other, but then one of the data links fail, and it's a critical data link. And the entire complex design, which has taken months to develop, and an expensive chip can fail because of that single-failed data link, which could fail for various reasons in the field. So Synopsis has developed something called MTR, MTR Interface IP.
[00:10:56] MTR stands for Monitor, Test, and Repair. So on the fly, in the field, problems can be detected and fixed without even the user noticing. So that increases the life and reliability of that chip. So essentially, redundant data links will be used when a problem is detected in a particular data link. That's an example, and you mentioned analytics. That's a very important component of all of this.
[00:11:24] We have significant technology and capabilities in this area, and what this does is that we introduce monitors inside the chip. So in the silicon, along with your normal transistors that perform the function that the chip is designed for, we introduce some additional transistors or circuits, which monitor as well as generate information, and it generates data. So this data, during the life cycle of the chip,
[00:11:53] can then be analyzed, and actionable insights can be gained from it, which in turn help with improving the aging and longevity of the chip. This is also essential in improving the reliability of these very complex systems. And besides the silicon health, what other components that are essential to complete this whole picture of reliability? Of course, like functional verification and physical verification,
[00:12:21] which have to support this very large system. As demand for AI training and high-performance computing continues to grow, can you tell me a little bit more about what this actually means for Synopsys and how it's already enabling breakthroughs in applications from financial forecasting to other compute-intensive fields? Yes, indeed, Neil. So applications like the ones you mentioned, financial forecasting and many of other applications, all of them are driving the use of AI,
[00:12:51] which in turn is driving the need for high-performance computing and AI chips, which are customized chips for enabling AI training and inferencing. So if you look at the AI workloads, there are two main kinds of workloads. One is for training, and the other is for inferencing. The AI training workload deals with a large number of data. You're processing a large number of data, and you're performing massive mathematical operations,
[00:13:21] matrix multiplications, tensor operations, etc. All of that requires massive compute. And so Synopsys is, through its innovations and through its EDA products, as well as with their IPs, are enabling and fueling this whole drive towards high computing by working with our partners and providing solutions like multi-die solutions, integrated multi-physics,
[00:13:48] architecture exploration, and best-in-class interface IPs, which allow these chips to be made. And it's not just enough to be made. You have to do feasibility analysis. You have to be able to connect with other parts of the ecosystem. All of that is extremely critical. In addition to that, if you look at other components that enable this, I mentioned advanced packaging in the past. That's very critical as well,
[00:14:15] to enable developing and manufacturing these complex devices. And we are working very closely with foundries to test and enable these technologies as well. And I'm curious, with chip complexity increasing, how are you at Synopsys balancing that need for innovation with those challenges of reducing costs, maintaining energy efficiency and semiconductor design? Because I would imagine it is quite a delicate balance.
[00:14:46] Yes, indeed it is. Of course, Synopsys is continuing to innovate to improve power performance in the area, not only in their EDA tools and offerings, but also in their interface IPs. As you may know, Synopsys is a leading interface IP vendor in the world. In fact, innovation is in our DNA, and there is significant emphasis and investment in R&D and Synopsys. These innovations are in existing products and workflows. If you push the envelope in performance,
[00:15:15] you may be giving up power and energy, and all of that is important. It's very important to maintain and be aware and be constrained by the energy profile. Everything we're doing. We also have offerings in cloud for our customers to leverage the cloud efficiently as well, to leverage the vast compute available on the cloud. Our advances made our cloud partners as well
[00:15:43] to introduce compute, which is power efficient, which we enable our customers to take advantage of. The continued innovation in space is important, and Synopsys is investing heavily in that area. And if we look into the future, what role do you see multi-architectures playing in advancing emerging technologies? That's where things get quickly exiled, especially when those emerging technologies begin to converge. But can you tell me a bit more about that
[00:16:11] and how Synopsys is preparing to lead in this evolving landscape too? What does the future hold for you? I mean, if you look at the innovations happening in these areas, the demand for higher computing power, higher power efficiency is what fueling a lot of these requirements. So whether it's automotive or HPC, which is high performance computing or AI, I mean, can still be considered an emerging technology. There is so much more that can be done.
[00:16:40] Co-packaged optics is another example of an emerging technology. And if you look at these emerging technologies, a common theme is that there is hyper-convergence of various domains, right? So for example, with crackage optics, we're talking about packaging your traditional CMOS with photonic ICs or PICs onto a single package. So that's referred to as heterogeneous integration. Then in automotives, you're mixing sensors and analog
[00:17:10] and digital all together into one device and so on. And so almost by definition, the only way to enable this is through using multi-die. And it's not just enough to create these separate dies, but then you need to connect them together efficiently in the same package. Therefore, you see we need advances in improving the interconnect density, which I referred to earlier, as well as advanced packaging.
[00:17:39] And then something that I haven't mentioned in some detail yet is this whole area of system analysis and multi-physics, which is essential for advanced technology. So you're talking about thermal integrity, which is a big concern. As more and more of these functions are bundled into a device, and these devices are now generating a lot of energy, you mentioned the energy problem earlier. So there needs to be significant breakthroughs in thermal mitigation,
[00:18:08] heat mitigation, as well as thermal analysis. So multi-physics, which means you're analyzing signal integrity, power integrity, concurrently and along the flow, that becomes very important as well. And all of what I mentioned is what Synopsys is investing in and has solutions. And we are working together with our ecosystem partners, leading edge partners, to test these reference flows and technologies and deploy these solutions to our customers.
[00:18:39] Well, thank you so much for taking the time to sit down with me today and share your insights with not only myself, but people listening all around the world. And I'm going to see if there's something we can do for you in return here, because some of the biggest names in business, VC, funding and tech have either been guests or maybe just maybe listen to this podcast or a friend of a friend will listen to this podcast. So let's test that six degrees of separation and ask you, is that a person that you'd love to have a private breakfast or lunch with?
[00:19:08] Who would it be and why? Because he or she might just get to hear this, but who would you choose there? Oh, that's a fantastic question. And wow, and what an opportunity if you can provide that opportunity. To me, this person would be awesome. But of course, this is other than you, right, Neil? I can't mention you. Well, you know, the person who comes to mind is Lisa Su, who's the CEO of AMD. I mean, she's a remarkable individual. And if you look at what she's accomplished under her watch,
[00:19:36] AMD has grown from, gosh, roughly $3 billion or so in revenue to more than $200 billion. I just like to learn from folks and from situations where they have, you know, taken on adversity, they've taken on a situation where, you know, things were not necessarily going well. They've overcome adversity and they win and they win big. What a great choice there.
[00:20:05] Unfortunately, I've not spoken with Lisa, but I think it was in Seattle in October. I was at Lenovo Tech World and I was about 20 feet away from her on stage. But hopefully somebody out there or somebody that knows Lisa will be able to make something happen there. And for anyone listening, just wanting to find out more information about you, the conversation we've had today around synopsis, and maybe we want to carry that conversation on. Where would you like to point everyone listening to find out more about all things synopsis?
[00:20:34] Yes, indeed. There's a wealth of information at our website. The URL is www.synopsis.com slash multidye. So we've covered so much there from reshaping semiconductor architecture to ensuring reliability with advanced analytics and maximizing performance with these flexible multidye integration. I love what you're doing at synopsis here. I think you've demystified it. You brought everything to life. Just thank you for taking the time to sit down with me today
[00:21:04] and share your insights. Of course, I'm happy to do so. I think it's clear that the semiconductor industry is entering a new chapter. One where multidye architectures are becoming the foundation for next generation AI and high performance computing. Whether it would be Synopsis' role in developing UCIE standards to the breakthroughs in silicon lifecycle management and AI-driven analytics. I think it's evident that the future of computing
[00:21:33] will be built on scalability, flexibility, and unprecedented power efficiency. So with 50% of new HPC chip designs expected to be multidye or 3D by the end of 2025, the question is, is your business and is your industry ready to adapt to this paradigm shift? And as AI becomes more integrated into chip design, will we see an acceleration of innovation
[00:22:02] that redefines what's possible in technology? Love to hear your thoughts on this one and where semiconductor innovation is heading and any takeaways from you or anything that you think we've missed from today's conversation. X, Instagram, LinkedIn, just at Neil C. Hughes. Nice and easy to find there. But it's time for me to pack my bags. Don't worry. I will be here tomorrow. I've got a guest lined up for you. But as I record this, it's time for me to prepare to fly to Silicon Valley.
[00:22:33] I've got a number of shows to do out there, so I'll be speaking to you then very soon. But as far as you're concerned, I'll be speaking with you as normal tomorrow morning. So I'll speak with you all then. Bye for now.